00001 /* 00002 ============================================================================== 00003 00004 Project: MOST NetServices 00005 Module: Adjustment for MOST NetServices 00006 File: adjust.h 00007 Version: 01.10.00 00008 Language: C 00009 Author(s): S.Kerber, R.Wilhelm 00010 Date: 02.Sept.2002 00011 Contents: Layer I+II 00012 FileGroup: 00013 Customer ID: <none> - To be used in conjunction with OSS Access DLL 00014 ------------------------------------------------------------------------------ 00015 00016 (c) Copyright 1998-2002 00017 Oasis SiliconSystems AG 00018 All Rights Reserved 00019 00020 ------------------------------------------------------------------------------ 00021 00022 00023 00024 Modifications 00025 ~~~~~~~~~~~~~ 00026 Date By Description 00027 00028 ============================================================================== 00029 */ 00030 00031 #ifndef _ADJUST_H 00032 #define _ADJUST_H 00033 00034 00035 /* 00036 * MOST_LINUX: 00037 * Always define _OSS_ACCESS_DLL since the Linux NetServices libary uses the direct access to the 00038 * MOST registers and not message mode 00039 */ 00040 #define _OSS_ACCESS_DLL 00041 00042 00043 //------------------------------------------------------------------- 00044 // MOST Hardware Definitions 00045 //------------------------------------------------------------------- 00046 00047 //----------------------------------------------// 00048 // Define Interface Configuration // 00049 //----------------------------------------------// 00050 #ifdef _OSS_ACCESS_DLL 00051 #define INTERFACE_CONFIG 7 // Select one configuration from table 00052 #else 00053 #define INTERFACE_CONFIG 1 // Select one configuration from table 00054 #endif 00055 //----------------------------------------------// 00056 // Interf.Conf. Interf.Conf. ID // 00057 //----------------------------------------------// 00058 // SP ser. / CP I2C 1 // Mode 1..8: If using MOST Transceiver OS8104 00059 // SP ser. / CP SPI 2 // 00060 // SP par. sync / CP I2C 3 // 00061 // SP par. sync / CP SPI 4 // 00062 // SP par. async / CP I2C 5 // 00063 // SP par. async / CP SPI 6 // 00064 // SP par. sync / CP parallel 7 // 00065 // SP par. async / CP parallel 8 // 00066 // // 00067 // SP ser. / CP Com Port 9 // Mode 9: If using internal MOST Transceiver (OS8401, OS8804, OS8805) 00068 //----------------------------------------------// 00069 00070 00071 //----------------------------------------------// 00072 // Define type of MOST Transceiver // 00073 //----------------------------------------------// 00074 #define MOST_TRANSCEIVER_ID 1 // ID 1: OS8104 (default, when using INTERFACE_CONFIG 1..8) 00075 // ID 2: OS8401 or OS8801 (default, when using INTERFACE_CONFIG 9) 00076 // ID 3: OS8804 00077 // ID 4: OS8805 00078 //----------------------------------------------// 00079 00080 00081 //----------------------------------------------// Notice: the choice of serial source data port is fix, 00082 // Define Source Port mode and speed // but you can dynamically switch between mode 1 and 2 00083 // (only if in serial mode) // or between mode 5 and 6 if using sometimes port 1 00084 //----------------------------------------------// as transparent data channel. 00085 #define SP_SER_MODE 1 // If you want to use this feature, you have to choose 00086 // // mode 2 or rather mode 6. 00087 //----------------------------------------------// 00088 // Mode SP0 SP1 SP2 SP3 // 00089 //----------------------------------------------// 00090 // 1 Na Na Na Na //==> N... represents a serial port format and the 00091 // 2 Na Tb Na Na // clock/bit rate the port is running on 00092 // 3 N128 -- N128 -- // 00093 // 4 N256 -- -- -- // a represents the clock/bit rate defined 00094 // 5 S1x Na Na Na // as SP_SER_CLOCKRATE 00095 // 6 S1x Tb Na Na // 00096 // 8 S2x -- Na Na // 00097 // 9 S2x -- N128 -- // S..x represents S/PDIF format with a certain speed 00098 // 10 S4x -- -- -- // 00099 // 11 S8xIn -- -- -- // T represents a transparent format with a sample rate 00100 // 12 S8xOut -- -- -- // defined as TRANSPARENT_SAMPLE_RATE 00101 // // 00102 //----------------------------------------------// 00103 // // 00104 #define SP_SER_CLOCKRATE 64 //==> 64,48,32,16 or 8 Fs (only if mode 1,2,5,6 or 8) 00105 // // only effective on ports which has a variable 00106 // // speed in a certain mode 00107 // // 00108 #define TRANSPARENT_SAMPLE_RATE 16 //==> = SP_SER_CLOCKRATE / b , there b can be 8,4,2 or 1 00109 // // 00110 // // ==> b = SP_SER_CLOCKRATE / TRANSPARENT_SAMPLE_RATE 00111 // // 00112 // // Transparent data transport is only available, 00113 // // if SP_SER_MODE = 2 or 6 00114 //----------------------------------------------// 00115 00116 00117 00118 #define MOST_MAP_16BIT // If this switch is defined, all register definitions are 16bit 00119 // values. In that case the RAM page switching must be done 00120 // by the Hardware Layer (Low-Level-Driver). 00121 // If this switch is not defined, the RAM page switching is done 00122 // by the NetServices. In that case, the application have to make sure 00123 // that page 0 is selected, whenever returning from respective procedure. 00124 // If using a Multi-Task-OS with the need to access onto Transceiver's 00125 // registers by application, this switch must be defined and the page supervision 00126 // must be done by the Hardware Layer. 00127 00128 00129 00130 00131 00132 //------------------------------------------------------------------- 00133 // Circumference of Net Services 00134 //------------------------------------------------------------------- 00135 00136 00137 //-------------------------- 00138 // MOST Net Service LayerII 00139 //-------------------------- 00140 // #define SERVICE_LAYER_II // Enable MOST NetServices Layer II 00141 00142 // #define NS_AMS_AH // Enable Interface between AMS and AH 00143 // #define NS_MNS_MNS2 // Enable Interface between MNS and MNS2 00144 // #define NS_MSV_NB // Enable Interface between MSV and NetBlock 00145 // #define NS_SCS_NB // Enable Interface between SCS and NetBlock 00146 00147 00148 00149 //-------------------------- 00150 // MOST Net Service Kernel 00151 //-------------------------- 00152 #define MNS_MIN // minimum requirement of MOST Net Services 00153 #define MNS_OPT_1 // Option 1: Provide Application with Request Flags for calling MostService() 00154 #define MNS_OPT_2 // Option 2: Parameter of MostService() is evaluated 00155 #define MNS_OPT_3 // Option 3: Provides a function to get lowest timer value 00156 // This option requires the definition of macro TIMER_INT_OPT. 00157 00158 00159 //-------------------------- 00160 // Control Message Service 00161 //-------------------------- 00162 #define CMS_TX_MIN // Tx Section, minimum requirement 00163 #define CMS_TX_ADD2 // single call transmission 00164 #define CMS_TX_ADD3 // check tx buffer 00165 #define CMS_TX_ADD4 // useful otional functions 00166 #define CMS_TX_ADD5 // Provides an additional callback function, which can be 00167 // used to filter or dispatch a message before transmission 00168 // #define CMS_TX_ADD6 // Feature that allows to send system messages without the need 00169 // to implement the respective service (SCS or RCS). 00170 // The system messages are entered into the CMS TX buffer directly. 00171 00172 00173 #define CMS_RX_MIN // Rx Section, minimum requirement 00174 #define CMS_RX_ADD1 // Msg polling 00175 #define CMS_RX_ADD2 // copy message to local memory 00176 #define CMS_RX_ADD3 // possibility to use addition receive input 00177 #define CMS_RX_ADD4 // providing Rx filter 00178 00179 00180 //-------------------------- 00181 // Appl.Msg. Service 00182 //-------------------------- 00183 #define AMS_TX_MIN // Tx Section, minimum requirement 00184 #define AMS_TX_ADD1 // check tx buffer 00185 #define AMS_TX_ADD3 // providing useful functions for encoding data field 00186 #define AMS_TX_ADD4 // possibility to transmit large messages, without 00187 // the need to provide a large AMS Tx Buffer 00188 #define AMS_TX_ADD5 // Provides an additional callback function, which can be 00189 // used to filter or dispatch a message before transmission 00190 #define AMS_TX_ADD6 // possibility to transmit and receive internal messages 00191 #define AMS_TX_ADD7 // possibility to postpone a failed transmission 00192 #define AMS_TX_ADD8 // possibility to store the parameters (Data field) of the 00193 // AMS message in an own buffer 00194 00195 00196 #define AMS_RX_MIN // Rx Section, minimum requirement 00197 #define AMS_RX_ADD1 // Msg polling 00198 #define AMS_RX_ADD2 // copy message to local memory 00199 #define AMS_RX_ADD3 // providing useful functions for decoding data field 00200 #define AMS_RX_ADD4 // possibility to receive internal messages 00201 #define AMS_RX_ADD5 // possibility to receive messages that are longer than 00202 // the internal AMS RX buffer entries. 00203 #define AMS_RX_ADD6 // check rx buffer 00204 00205 00206 00207 // #define AMS_TX_NOSEG // there is no need to be able to transmit segmented messages 00208 // #define AMS_RX_NOSEG // there is no need to be able to receive segmented messages 00209 00210 00211 #define AMS_TX_BYPASS_FILTER // enables the possibility to bypass a message, which has been entered 00212 // in the AMS TX FIFO, to the CMS TX service directly. 00213 // Only possible if it is a single telegram and only if the target 00214 // address is unequal 0xFFFF. 00215 00216 00217 00218 //-------------------------- 00219 // Remote Control Service 00220 //-------------------------- 00221 #define RCS_WRITE // Remote Write available 00222 #define RCS_READ // Remote Read available 00223 00224 00225 00226 //-------------------------- 00227 // Synchr.Ch.Alloc. Service 00228 //-------------------------- 00229 #define SCS_SOURCE_ALLOC_MIN // allocate / deallocate minimum requirement (source) 00230 #define SCS_SOURCE_RE_MIN // connect / disconnect minimum requirement (source) 00231 #define SCS_SOURCE_ADD1 // single call functions for allocation and routing (source) 00232 #define SCS_SINK_RE_MIN // connect / disconnect minimum requirement (sink) 00233 #define SCS_ADD1 // detect channels by label (source & sink) 00234 00235 //#define SCS_NO_ADDR_CALC // Calculation of each address reference value for the 00236 // Routing-Engine is done by application or before compilation 00237 00238 00239 00240 00241 #ifndef _OSS_ACCESS_DLL 00242 //-------------------------- 00243 // Transp.Ch.Alloc. Service 00244 //-------------------------- 00245 #define TCS_SOURCE_ALLOC // allocate / deallocate transparent data channels 00246 #define TCS_SOURCE_RE // connect / disconnect transparent data channels 00247 #define TCS_SOURCE_ALLOC_RE // single call functions for transparent data channels 00248 #define TCS_SINK_RE // connect / disconnect transparent data channels 00249 #endif 00250 00251 00252 //-------------------------- 00253 // MOST Supervisor 00254 //-------------------------- 00255 // #define MSV_MINIMUM // Select only one Supervisor (minimum OR extended OR virtual) 00256 00257 #ifdef _OSS_ACCESS_DLL 00258 #define MSV_EXTENDED 00259 #endif 00260 00261 #ifndef _OSS_ACCESS_DLL 00262 #define MSV_VIRTUAL // If this macro is defined, no MOST Supervisor will 00263 #endif // be implemented. In that case only an interface will be 00264 // implemented between the "real" Supervisor in the 00265 // Driver Layer and the NetServices Basic Layer. 00266 // Please make sure that MNS_MSG_INTF is defined, 00267 // if this item (MSV_VIRTUAL) is selected. 00268 00269 00270 #define MSV_ADD1 // enable for SET_BYPASS 00271 // by application. Only available, if MSV_EXTENDED is selected. 00272 00273 00274 #define MSV_ADD2 // Callback function MostUpdateNpr() is called, whenever 00275 // the Node Position Register (bNpr) has been updated. 00276 // Only available, if MSV_EXTENDED or MSV_VIRTUAL is selected. 00277 00278 00279 #define MSV_ADD3 // Enable this switch to avoid problems in using 00280 // the parallel asychronous sorce port interface in 00281 // case of an unlock. If an unlock occured, while having 00282 // access on this interface, the network is shut down. 00283 // This workaround is only needed if using the parallel 00284 // asynchronous source port interface. 00285 00286 #define MSV_ADD4 // Additional initialisation function MostStartUpExt() 00287 00288 #define MSV_ADD5 // Additional callback function that is called after the 00289 // MOST Transceiver has been reset 00290 00291 00292 #define MOST_CHECK_INT Most_Por_Int() // Only needed, if MSV_ADD3 is defined: 00293 // Define a function, that is called by module MSV to check 00294 // the state of the MOST Transceiver's interrupt pin (inverted). 00295 // That means that the function has to return TRUE, if the state of 00296 // pin is low. 00297 // If the interrupt pin is not accessible by the software, 00298 // the macro has not to be defined. 00299 00300 00301 00302 //-------------------------- 00303 // MOST Control Service 00304 //-------------------------- 00305 #define MCS_MIN // minimum requirement of MOST Control Service 00306 #define MCS_ADD1 // interrupt management 00307 #define MCS_ADD2 // address setting 00308 #define MCS_ADD3 // rmck frequency setting 00309 #define MCS_ADD4 // mute/demute source data outputs 00310 #define MCS_ADD5 // reading node delay and maximum delay 00311 #define MCS_ADD6 // provides access to alternative packet address 00312 // #define MCS_ADD7 // additional functions that are used in secondary node scenario 00313 // (only possible, if SECONDARY_NODE is defined) 00314 00315 #define MCS_ADD8 // additional functions for accessing MOST Transceiver's register 00316 00317 #define MCS_ADD9 // function to request channels by label, similar to SyncFindChannels() 00318 00319 #define MCS_MASTER_ADD1 // pll inselect 00320 #define MCS_MASTER_ADD2 // bandwidth setting 00321 00322 00323 #ifndef _OSS_ACCESS_DLL 00324 #define MOST_SET_NODEADR_EX(nadr) MostSetNodeAdrEx((nadr)) 00325 // Callback function, that is called on change of NodeAddress 00326 00327 #define MOST_SET_GRPADR_EX(gadr) MostSetGroupAdrEx((gadr)) 00328 // Callback function, that is called on change of GroupAddress 00329 #endif 00330 00331 00332 00333 00334 //-------------------------- 00335 // Async Data Transmission 00336 // Service 00337 //-------------------------- 00338 #ifndef _OSS_ACCESS_DLL 00339 #define ADS_TX_MIN // Tx Section, minimum requirement 00340 #define ADS_TX_ADD1 // Single call transmission 00341 #define ADS_TX_ADD2 // check tx buffer 00342 #define ADS_TX_ADD3 // Application is recalled, whenever a packet was transmitted 00343 00344 00345 #define ADS_RX_MIN // Rx Section, minimum requirement 00346 #define ADS_RX_ADD1 // polling rx section 00347 #define ADS_RX_ADD2 // copy received data packet to local memory 00348 #define ADS_RX_ADD3 // enable additional callback to filter and dispatch received telegrams 00349 #define ADS_RX_ADD4 // enable additional callback to notify captured error events 00350 #endif 00351 00352 00353 00354 00355 00356 00357 00358 00359 00360 //------------------------------------------------------------------- 00361 // Control Message Service 00362 //------------------------------------------------------------------- 00363 00364 // Define Buffer Size 00365 //-------------------------------- 00366 00367 #define MAX_CTRL_TX_MSG 100 // size of Tx-Message-Buffer 00368 #define MAX_TX_HANDLE 1 // number of extended tx data bytes, which will not be send (TxHandle) 00369 #define MAX_CTRL_RX_MSG 100 // size of Rx-Message-Buffer 00370 #define MAX_EXT_DATA 8 // number of extended rx data bytes of a receive message (timestamp,...) 00371 00372 00373 // Define Switches 00374 //-------------------------------- 00375 #define CTRL_TX_SUCCESS // Application will also be recalled, if transmission was succesful 00376 #define CTRL_TX_CRC 0 // number of occured crc errors until application will be informed about 00377 00378 //#define CTRL_RX_TELLEN // Read rx buffer in respect of length field (depending on protocol). 00379 // If not defined, the whole rx buffer is read. 00380 00381 //#define CTRL_FILTER_ID // If defined: Each CMS and AMS buffer entry provides an additional 00382 // filter ID field, which can be used to dispatch the message in the 00383 // respective filter functions. 00384 00385 00386 00387 00388 //------------------------------------------------------------------- 00389 // Application Message Service 00390 //------------------------------------------------------------------- 00391 00392 // Define Buffer Size 00393 //-------------------------------- 00394 00395 #define MAX_MSG_TX_MSG 100 // size of Tx-Message-Buffer 00396 #define MAX_MSG_TX_DATA 4096 // number of data bytes per tx application message 00397 // number of extended tx data bytes (TxHandle) is equal to the number 00398 // of extended tx data bytes of the control message buffer 00399 00400 #define MAX_MSG_RX_MSG 100 // size of Rx-Message-Buffer 00401 #define MAX_MSG_RX_DATA 4096 // number of data bytes per rx application message 00402 // number of extended rx data bytes is equal to the number of 00403 // extended bytes of the control message buffer 00404 // Define Switches 00405 //-------------------------------- 00406 #define MSG_TX_SUCCESS // Application will also be recalled, if transmission was succesful 00407 00408 00409 00410 //------------------------------------------------------------------- 00411 // Asyncronous Data Transmission Service 00412 //------------------------------------------------------------------- 00413 00414 // Define Buffer Size 00415 //-------------------------------- 00416 #define MAX_DATA_TX_MSG 50 // size of Tx-Message-Buffer 00417 #define MAX_DATA_TX_HANDLE 1 // number of extended tx data bytes, which will not be send (TxHandle) 00418 #define MAX_DATA_RX_MSG 50 // size of Rx-Message-Buffer 00419 #define MAX_DATA_EXT_DATA 8 // number of extended rx data bytes of a receive packet (e.g. timestamp,...) 00420 00421 00422 00423 00424 00425 //------------------------------------------------------------------- 00426 // MOST Supervisor 00427 //------------------------------------------------------------------- 00428 00429 #define OFF_MODE_DEFAULT 1 // preselect the default value of Off_Mode: 00430 // 0: NET_OFF only by application request 00431 // 1: NET_OFF by request and no light 00432 // 2: NET_OFF by request, no light and no lock 00433 // Please note: This value is relevant only in a timing 00434 // master device. In a slave device this 00435 // value will be 2. 00436 00437 // #define MSV_TIMEOUT_DIAGNOSIS 30000 // Timeout for Ringbreak Diagnosis [msec] 00438 // Range: 4000..60000 [msec] 00439 // Please note: This optional macro should only be 00440 // defined if desired by the system integrator. 00441 // If this macro is not defined the default value 00442 // that has been specified in the MOST Specification 00443 // is used. 00444 00445 00446 // #define MSV_REMOTE_STARTUP_ENABLE // TimingMaster only: 00447 // Enable following workaround: All devices with closed bypass are 00448 // pushed into the network by sending remote write messages. 00449 // This workaround avoids problems forced by devices, which need a long 00450 // time ( > 100ms) to open its bypass. 00451 // This workaround is available only if using MSV_EXTENDED. 00452 00453 //------------------------------------------------------------------- 00454 // General Options 00455 //------------------------------------------------------------------- 00456 00457 #define TIMER_INT_OPT // If this macro is defined, the API function 00458 // MostTimerIntDiff() must be used instead of MostTimerInt(). 00459 // In that case the interval between two timer interrupts must be 00460 // notified by argument. The macro TIMER_INT_DIV has no effect. 00461 00462 00463 #define TIMER_INT_DIV 25 // Select Frequency of Timer Interrupt 00464 // 1: You have to call MostTimerInt() every 1ms. 00465 // 10: You have to call MostTimerInt() every 10ms. 00466 // 25: You have to call MostTimerInt() every 25ms. 00467 00468 00469 // #define USE_OWN_TYPE_DEFINITION // If this macro is NOT defined the default basic types 00470 // are used, which are defined in 'MostDef1.h'. 00471 // If this macro is defined, you have to define the following 00472 // basic data types by yourself: bool, byte, word, and dword. 00473 // In that case the basic type definitions must be included 00474 // in this 'adjust.h' file. 00475 00476 00477 00478 //------------------------------------------------------------------- 00479 // Extended Interface between Layer I and Hardware Layer 00480 //------------------------------------------------------------------- 00481 00482 //#define MNS_MSG_INTF // The MOST NetServices Kernel provides the message based MNS Control Interface. 00483 // This interface puts command messages into the CTRL-IN-FIFO in the HW Layer. 00484 // It also receives info messages from the CTRL-OUT-FIFO in the HW Layer. 00485 00486 //#define CMS_MSG_INTF // The Control Message Service (CMS) provides a message based interface. 00487 // It uses the MNS Control Interface to send Command Messages to the HW Layer 00488 // and to receive info messages from the HW Layer. 00489 // Furthermore it uses the MOST Message interface to send/ receive MOST messages. 00490 // Therefore it is a must to define MNS_MSG_INTF, if this feature is selected. 00491 00492 //#define MCS_MSG_INTF // The MOST Transceiver Control Service provides an additional interface 00493 // to write and read registers of the MOST Transceiver using the message based 00494 // MNS Control Interface. Therefore it is a must to define MNS_MSG_INTF, if 00495 // this feature is selected. 00496 00497 //#define NO_DIRECT_REG_ACCESS // If this macro is defined, the standard hardware layer interface 00498 // (MOST_WRITE, MOST_READ, MOST_WRITEBLOCK, MOST_READBLOCK) is not used 00499 // by MCS, SCS and TCS. 00500 // This feature can only be selected, if MNS_MSG_INTF and MCS_MSG_INTF are enabled. 00501 // This feature is recommend in case of CMS_MSG_INTF and MSV_VIRTUAL is enabled. 00502 // In that case no direct control port access is performed by the MOST NetServices. 00503 00504 00505 00506 //------------------------------------------------------------------- 00507 // Secondary Node Solution 00508 //------------------------------------------------------------------- 00509 // #define SECONDARY_NODE // One Transceiver provides access to control channel and asynchronous channel 00510 // The secondary node provides access to the synchronous channels. 00511 00512 // #define SECONDARY_NODE_OPT_1 // If this macro is defined, the secondary note is in front of the primary node. 00513 // (RX of secondary node and TX of primary node are connected to the network). 00514 // If this macro is NOT defined, the primary node must be in front of the secondary node. 00515 00516 // #define SECONDARY_NODE_CALC_ADDR(a) ((a)+1) // This rule determines the node address of the secondary node. 00517 // Argument "a" means the node address of the primary node. 00518 00519 // #define PADT // Primary Node: Asynchronous data exchange is done via source port 00520 // interface (parallel asynchronous mode). 00521 // If this macro is not defined, the control port interface 00522 // is used to exchange asynchronous data. 00523 00524 // Please select only one macro to choose the used source port mode in secondary node: 00525 // #define SP_SER // Secondary Node: Source port is used in serial mode. 00526 // #define SP_PAR // Secondary Node: Source port is used in parallel synchronous mode. 00527 00528 // Please select only one macro to choose the used control port mode in primary node: 00529 // #define CP_I2C // Primary Node: Control port in I2C mode 00530 // #define CP_SPI // Primary Node: Control port in SPI mode 00531 // #define CP_PAR // Primary Node: Control port in PAR mode 00532 00533 #define ERR_SEC_NODE_SPEC_2V1 // When this switch is defined, the error message "SecondaryNode" is 00534 // implemented as specified in MOST Spec Rev.2.1: 00535 // - "NetBlock.Pos.000.F.03.(0A.NodeAddrPrimNode)" 00536 // 00537 // If this switch is not defined, the error message is implemented 00538 // as follows: 00539 // - "FBlockID.InstID.FktID.F.03.(0A.NodeAddrPrimNode)" 00540 00541 // #define PWD_SENSITIVITY_SEC_NODE // Optional adjustment of the PWD sensitivity for the secondary node. 00542 // When this macro is not defined, the bXSR2 register in the secondary node 00543 // will contain the same value as in the primary node (macro PWD_SENSITIVITY). 00544 00545 00546 00547 00548 00549 00550 00551 //------------------------------------------------------------------- 00552 // Predefined Transceiver Settings 00553 //------------------------------------------------------------------- 00554 00555 00556 // The following constants and switches have influence on the MOST registers 00557 // SDC1, SDC2, SDC3, XCR, XSR, CM1, SBC while initializing the MOST Transceiver. 00558 // These information have to be set only if needed. 00559 00560 //----------------------------------------------// 00561 // Define Options (Register SDC1) // 00562 //----------------------------------------------// 00563 #define EDG_SCK 0 // Active edge of SCK: 00564 // 0 = falling edge 00565 // 1 = rising edge 00566 //----------------------------------------------// 00567 #define DEL_FSY 0 // Delay first bit against FSY: 00568 // 0 = no delay between first bit of a sample and FSY change 00569 // 1 = one SCK cycle delay 00570 //----------------------------------------------// 00571 #define POL_FSY 0 // Polarity of FSY: 00572 // 0 = FSY signal=1 indicates right sample 00573 // 1 = FSY signal=1 indicates left sample 00574 //----------------------------------------------// 00575 #define IO_FSY 0 // Input/Output select of FSY and SCK (only relevant if S/PDIF disabled): 00576 // 0 = FSY and SCK are both inputs 00577 // 1 = FSY and SCK are both outputs 00578 //----------------------------------------------// 00579 #define SOURCE_MUTE 0 // Mute Source Data Outputs (default after initialisation): 00580 // 0 = output ports SX0..3 in normal operation 00581 // 1 = output ports SX0..3 are digitally muted 00582 //----------------------------------------------// 00583 #define TCH_DISABLE 0 // Transparent Channel disable after initialisation: 00584 // ( only relevant if SP_SER_MODE allows usage of transparent channels) 00585 // 0 = source port 1 works in transparent mode 00586 // 1 = source port 1 is working as regular serial port until 00587 // port 1 is explicitly set to transparent mode 00588 //----------------------------------------------// 00589 #define SP_DISABLE 0 // Source Ports disable (OS8805 only): 00590 // 0 = source ports are enabled 00591 // 1 = source ports are disabled (EGPIO mode, only available in OS8805) 00592 // Setting IO_FSY is ignored (bits 1..2 in bSDC1 will be set) 00593 //----------------------------------------------// 00594 00595 00596 00597 00598 //----------------------------------------------// 00599 // Define Options (Register SDC2) // 00600 //----------------------------------------------// 00601 #define MFSY_ENABLE 0 // Multi speed FSY enable 00602 // 1 = enable 00603 // 0 = disable 00604 //----------------------------------------------// 00605 00606 00607 00608 //----------------------------------------------// 00609 // Define Options (Register SDC3) // 00610 //----------------------------------------------// 00611 #define SPDIF_SYNC 0 // S/PDIF sync source (only relevant if S/PDIF enabled): 00612 // 0 = synchronize S/PDIF output timing to S/PDIF input 00613 // 1 = generate independent S/PDIF output timing 00614 //----------------------------------------------// 00615 00616 00617 00618 //----------------------------------------------// 00619 // Define Options (Register XCR) // 00620 //----------------------------------------------// 00621 #define SOURCE_BYPASS 0 // Source Data Bypass (default after initialisation): 00622 // 0 = Source data exchange available (sink and source) 00623 // 1 = Source data directly bypassed (sink only) 00624 //----------------------------------------------// 00625 #define RMCK_ENABLE 1 // RMCK (System clock) output enable: 00626 // 1 = output enabled 00627 // 0 = output disabled (high impedance) 00628 //----------------------------------------------// 00629 00630 00631 00632 //----------------------------------------------// 00633 // Define Options (Register XSR) // 00634 //----------------------------------------------// 00635 #define MASK_ERR_SPDIF 1 // Mask S/PDIF lock error: 00636 // 0 = S/PDIF lock error is captured 00637 // 1 = S/PDIF lock error is ignored 00638 //----------------------------------------------// 00639 #define MASK_ERR_TRANS 0 // Mask transceiver lock error: 00640 // 0 = transceiver lock error is captured 00641 // 1 = transceiver lock error is ignored 00642 //----------------------------------------------// 00643 #define MASK_ERR_CODING 0 // Mask coding error: 00644 // 0 = coding error is captured 00645 // 1 = coding error is ignored 00646 //----------------------------------------------// 00647 00648 00649 //----------------------------------------------// 00650 // Define Options (Register CM1) // 00651 //----------------------------------------------// 00652 #define PLL_INPUT 2 // PLL input select: 00653 // This setting will be used only when the device 00654 // operates as timing master, or whenever the 00655 // RMCK (additional clock output) is used in a slave 00656 // device while being in state VIRTUAL_ZERO_POWER. 00657 // It can be necessary for a slave device to operate 00658 // as timing master while performing diagnosis. 00659 // In a timing master device this setting will be used 00660 // in normal operation too. 00661 // In a slave device this setting will be ignored while 00662 // the NetInterface is in normal operation mode. 00663 // In that case the pll input will be set to rx network 00664 // receive input pin. 00665 // Possible values: 00666 // 1 = clock syncronized to S/PDIF input 00667 // 2 = clock syncronized to crystal or external clock input 00668 // 3 = clock syncronized to bit clock input (SCK) 00669 // 00670 // 00671 #define PLL_NET_OFF 1 // PLL operation mode while network is switched off: 00672 // In a slave device it can be necessary to change the Pll input 00673 // whenever the NetInterface is into state NET_OFF or 00674 // VIRTUAL_ZERO_POWER. 00675 // Possible values: 00676 // 0 = pll input remain to rx network receive input pin (RMCK not available) 00677 // 1 = pll input is set to the value specified in PLL_INPUT (RMCK available) 00678 // 00679 // 00680 //----------------------------------------------// 00681 #define XTL_DIVIDER 384 // Oscillator divider: 00682 // 256, 384, or 512 Fs 00683 //----------------------------------------------// 00684 #define RMCK_DIVIDER 1024 // RMCK divider: 00685 // 64, 128, 256, 384, 512, 768, 1024 or 1536 Fs 00686 //----------------------------------------------// 00687 00688 00689 //----------------------------------------------// 00690 // Define Synchronous Bandwith (Register SBC) // 00691 //----------------------------------------------// 00692 #define SBC_DEFAULT 0x08 // Synchronous Bandwith default value after StartUp 00693 // (only relevant for timing master devices) 00694 //----------------------------------------------// 00695 00696 00697 00698 //----------------------------------------------// 00699 // Adjust Optical Interface // 00700 //----------------------------------------------// 00701 #define PWD_SENSITIVITY 0x02 // Adjustment of PWD sensitivity depending on the used optical interface: 00702 // 00703 // Possible values: 0x02: compensating short high signals (if using HP FOT-AddOn-Module) 00704 // 0x00: compensating long high signals (if using Infineon FOT) 00705 //----------------------------------------------// 00706 00707 00708 00709 //----------------------------------------------// 00710 // Adjust Interrupt Enable Register // 00711 //----------------------------------------------// 00712 // #define INT_ENABLE_AFTER_RESET 0xF // This value contains the interrupts, which will be enabled after starting up the 00713 // MOST Transceiver. 00714 // If this macro is not defined by user, the value 0xF (all interrupts) is used by NetServices. 00715 //----------------------------------------------// 00716 00717 00718 00719 00720 00721 //------------------------------------------------------------------- 00722 // Microcontroller specific Hardware Definitions 00723 // Only needed by MOST NetService Kernel 00724 //------------------------------------------------------------------- 00725 00726 // #define DISABLE_TIMER_INT ??? // You can fill out these macros to enable/disable the timer-interrupt 00727 // #define ENABLE_TIMER_INT ??? // depending on your target hardware 00728 00729 00730 // #define NS_INC_TGT_SPEC "my_file.h" // This file is included in MNS.C, MNS2.C and MHP.C respectively. 00731 // It must contain all the declarations, which are required 00732 // by the target hardware specific instructions. 00733 00734 // Please note: These macros are optional and can be used if required 00735 00736 // Example for Cougar Microcontroller: 00737 #ifdef COUGAR_COMPILER 00738 00739 #define DISABLE_TIMER_INT (ier &= ~(int)0x0040) // macro to disable the timer-interrupt of the microcontroller 00740 #define ENABLE_TIMER_INT (ier |= (int)0x0040) // macro to enable the timer-interrupt of the microcontroller 00741 00742 00743 #define NS_INC_TGT_SPEC "cougarns.h" // This file is included in MNS.C, MNS2.C and MHP.C respectively. 00744 // It contains all Cougar specific definitions. 00745 #endif 00746 //------------------------------------------------------------------- 00747 00748 00749 00750 00751 #define MOST_INT_RESET(a) MostResetInt(a) 00752 00753 00754 00755 00756 00757 00758 00759 00760 //------------------------------------------------------------------- 00761 // User specific Include Files 00762 //------------------------------------------------------------------- 00763 00764 // The following files are included in the respective NetServices modules: 00765 00766 // #define NS_INC_ADS "My_File.h" // File is included in module ads.c 00767 // #define NS_INC_AMS "My_File.h" // File is included in module ams.c 00768 // #define NS_INC_CMS "My_File.h" // File is included in module cms.c 00769 // #define NS_INC_MCS "My_File.h" // File is included in module mcs.c 00770 // #define NS_INC_MNS "My_File.h" // File is included in module mns.c 00771 #define NS_INC_MSV "msv_linux.h" // File is included in module msv.c 00772 // #define NS_INC_RCS "My_File.h" // File is included in module rcs.c 00773 // #define NS_INC_SCS "My_File.h" // File is included in module scs.c 00774 // #define NS_INC_TCS "My_File.h" // File is included in module tcs.c 00775 00776 //------------------------------------------------------------------- 00777 00778 00779 00780 00781 00782 00783 00784 00785 00786 #endif // _ADJUST_H 00787
1.5.0