MOST Linux Drivers (Linux and RTAI): /home/hillier_g/checkout/most4linux/most-kernel/most-constants.h File Reference

#define PCI_VENDOR_ID_OASIS 0x121D

The vendor ID ("OASIS") for the MOST PCI card.

Definition at line 38 of file most-constants.h.

#define PCI_DEVICE_ID_OASIS_MOST_PCI_INTERFACE 0x4711

The device ID for the MOST PCI card from OASIS Silicon Systems. Together with the PCI_VENDOR_ID_OASIS, this must be unique for this card.

Definition at line 44 of file most-constants.h.

#define MOST_DEVICE_NUMBER 8

Number of devices (PCI cards) that can be in the system at the same time. It makes sense to define this value static because the number of devices available in /dev/ has to be static, too (and this must be the same value). And the interrupt parameter contains the device number, so a array lookup is fater than a list search.

Definition at line 52 of file most-constants.h.

Referenced by high_driver_deregistered(), high_driver_registered(), most_sync_probe(), most_sync_rt_probe(), nets_probe(), probe(), proc_show(), and process_sigsend_handler().

#define MOST_MAX_POLL 1024

Maximum polling number. Used in control-port operations.

Definition at line 57 of file most-constants.h.

Referenced by loop_until_bit_is_clear().

#define MAX_RETRIES 10

Maximum retry count. (use grep to see where the constant is used)

Definition at line 62 of file most-constants.h.

Referenced by most_sync_nrt_close().

#define MOST_DELAY_INCREMENT 10

Amount of time in ns that the delay is incremented between pollings. The value starts with 0 and is incremented by this value.

If MOST_MAX_POLL is 1024 and MOST_DELAY_INCREMENT is 10, the overall time for polling takes about 3 ms.

Definition at line 71 of file most-constants.h.

Referenced by loop_until_bit_is_clear().

#define MOST_SYNC_OPENS 8

How often can a /dev/mostsyncX device be opened?

Definition at line 76 of file most-constants.h.

Referenced by most_sync_do_open(), most_sync_nrt_open(), and most_sync_probe().

#define NUM_OF_QUADLETS (60/4)

Number of quadlets in a MOST frame.

Definition at line 81 of file most-constants.h.

#define STD_MOST_FRAMES_PER_SEC 44100

Usual number of MOST frames per second

Definition at line 86 of file most-constants.h.

#define MOST_FEATURE_SYNC (1 << 0)

Feature mask for the synchronous transfer.

Definition at line 91 of file most-constants.h.

Referenced by features().

#define MOST_FEATURE_ASYNC (1 << 1)

Feature mask for the asynchronous transfer.

Definition at line 96 of file most-constants.h.

Referenced by features().

#define MOST_FEATURE_MASTER (1 << 2)

Feature mask for the master capability.

Definition at line 101 of file most-constants.h.

Referenced by features().

#define MOST_FEATURE_CTRL (1 << 3)

Feature mask for the control transfer.

Definition at line 106 of file most-constants.h.

Referenced by features().

#define MOST_PCI_CMD_REG (0x00)

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.1.1 Command (CMD) Register -> p. 76

Definition at line 118 of file most-constants.h.

Referenced by read_data_8104(), reset(), write_data_8104(), and write_map_8104().

#define MRST (1 << 11)

MOST Reset bit: If the MOST Reset bit is set (`1'), a reset pulse on the MOST Reset Signal (MOST_RST_N) will be generated. After execution of reset, the bit will be cleared automatically.

It should be noted that if the OS8604 detects a rising edge on the PCI_RST_N signal a low active reset pulse on the MOST_RST_N signal is performed.

Definition at line 130 of file most-constants.h.

Referenced by reset().

#define EXEC (1 << 10)

Execute bit: The Execute bit starts the execution of the operation that is defined by the CPOP bits. After execution of the specified control port operation, the EXEC bit will be automatically set to `0' and a Control Port FSM Interrupt will be generated.

EXEC = 1 -> Start control port operation
EXEC = 0 -> Control port operation successfully executed

Definition at line 141 of file most-constants.h.

Referenced by read_data_8104(), reset(), write_data_8104(), and write_map_8104().

#define CPOP1 (1 << 9)

Control Port Operation bits: The Control Port Operation bits determine which operation will be executed on the control port of the MOST Transceiver. The bits are coded as follows.

CPOP1/CPOP0 = 00 -> Write Control Port MAP
CPOP1/CPOP0 = 01 -> Read Control Port Status
CPOP1/CPOP0 = 10 -> Write Control Port Data
CPOP1/CPOP0 = 11 -> Read Control Port Data

Definition at line 152 of file most-constants.h.

Referenced by read_data_8104(), and write_data_8104().

#define CPOP0 (1 << 8)

See also:: CPOP1

Definition at line 157 of file most-constants.h.

Referenced by read_data_8104().

#define CMD_DATA 0xff

Control Port Data bits: These bits represent the data bits transferred by the Control Port.

Definition at line 164 of file most-constants.h.

#define VALUE_DATA 0xff

Control Port Data bits: These bits represent the data bits transferred by the Control Port.

Definition at line 171 of file most-constants.h.

Referenced by read_data_8104().

#define MOST_PCI_RST_REG 0x04

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.2.1 Reset (RST) Register -> p. 77

Definition at line 179 of file most-constants.h.

#define MOST_PCI_CTRL_REG 0x08

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.2.2 Control (CTRL) Register -> p. 79

Definition at line 187 of file most-constants.h.

#define WREN (1 << 3)

MOST Source Port Write Enable bit:

WREN = '0' -> Write Operations on Source Port of MOST Chip are deactivated.
WREN = '1' -> During each SF Interval 8 write operations on the Source Port of the MOST Chip are executed.

Please note: If a synchronous or asynchronous transmit transfer is started the write operations are activated regardless if the WREN bit is set or not.

Definition at line 200 of file most-constants.h.

#define RDEN (1 << 2)

MOST Source Port Read Enable bit:

RDEN = '0' -> Read Operations on Source Port of MOST Chip are deactivated.
RDEN = '1' -> During each SF Interval 8 Read Operations on the Source Port of the MOST Chip are executed. By default, the RDEN bit is cleared ('0').

Please note: If a synchronous or asynchronous receive transfer is started the read operations are activated regardless if the RDEN bit is set or not.

Definition at line 213 of file most-constants.h.

#define TXBIGEN (1 << 1)

Transmit Big Endian Enable bit: This bit defines the data format of the transmitted synchronous data quadlets.

TXBIGEN = `0' -> Little Endian data format
TXBIGEN = `1' -> Big Endian data format

Definition at line 221 of file most-constants.h.

#define RXBIGEN (1 << 0)

Receive Big Endian Enable bit: This bit defines the data format of the received synchronous and asynchronous data quadlets.

RXBIGEN = `0' -> Little Endian data format
RXBIGEN = `1' -> Big Endian data format

Definition at line 230 of file most-constants.h.

#define MOST_PCI_LOCKSTATUS_REG (0x0C)

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.2.3 MOST Lock Status (LOCKSTATUS) Register -> p. 82

Definition at line 238 of file most-constants.h.

#define MOST_PCI_INTMASK_REG (0x10)

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.2.4 Interrupt Mask (INTMASK) Register -> p. 82

Definition at line 246 of file most-constants.h.

Referenced by handle_interrupt(), and intset().

#define IEMLOCK (1 << 8)

Interrupt Enable bit for MOST Lock/Unlock Interrupt: If this bit is set (`1'), a PCI Interrupt will be generated if the MOST Transceiver is changing lock state.

Definition at line 253 of file most-constants.h.

#define IEMAINT (1 << 7)

Interrupt Enable bit for MOST Asynchronous Interrupt: If this bit is set (`1'), a PCI Interrupt will be generated if an Asynchronous Interrupt on the MOST Chip occurs.

Definition at line 260 of file most-constants.h.

Referenced by ioctl_irq_reset(), and ioctl_irq_set().

#define IEMINT (1 << 6)

Interrupt Enable bit for MOST Interrupt: If this bit is set (`1'), a PCI Interrupt will be generated if an Interrupt on the MOST Chip occurs.

Definition at line 267 of file most-constants.h.

Referenced by ioctl_irq_reset(), ioctl_irq_set(), and nets_int_handler().

#define IEGP (1 << 5)

Interrupt Enable bit for General Purpose Interrupt: If this bit is set (`1'), a PCI Interrupt will be generated if an Interrupt is pending at the GP_INT Pin of the OS8604. The GP_INT pin is level sensitive and active high.

Definition at line 275 of file most-constants.h.

#define IESRX (1 << 4)

Interrupt Enable bit for Synchronous RX Interrupt: If set (`1'), a PCI Interrupt will be generated if the initiator changes the Synchronous RX Buffer Page.

Definition at line 282 of file most-constants.h.

#define IESTX (1 << 3)

Interrupt Enable bit for Synchronous TX Interrupt: If set (`1'), a PCI Interrupt will be generated if the initiator changes the Synchronous TX Buffer Page.

Definition at line 289 of file most-constants.h.

Referenced by most_alsa_int_handler().

#define IEARX (1 << 2)

Interrupt Enable bit for Asynchronous RX Interrupt: If set (`1'), a PCI Interrupt will be generated if an asynchronous message is received. Interrupt Enable bit for Asynchronous TX Interrupt:

Definition at line 296 of file most-constants.h.

#define IEATX (1 << 1)

Interrupt Enable bit for Asynchronous TX Interrupt: If set (`1'), a PCI Interrupt will be generated if an asynchronous message is transmitted.

Definition at line 303 of file most-constants.h.

#define IECPFSM (1 << 0)

Interrupt Enable bit for Control Port Finite State Machine Interrupt: If set (`1'), a PCI Interrupt will be generated if the Control Port State Machine has executed a Control Port operation successfully.

Definition at line 310 of file most-constants.h.

#define MOST_PCI_INTSTATUS_REG (0x14)

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.2.5 Interrupt Status (INTSTATUS) Register -> p. 83

Definition at line 318 of file most-constants.h.

Referenced by handle_interrupt(), intclear(), and ioctl_read_int().

#define ISMAINT (1 << 7)

Interrupt Status bit for MOST Asynchronous Interrupt: This bit is `1', as long as the /AINT signal of the MOST Transceiver is active (= `0'). If the IEMAINT bit in the Interrupt Mask register (INTMASK) is set, a PCI Interrupt will be generated.

Writing a `1' clears this bit. If the /AINT signal is still active the bit is set again immediately.

Definition at line 329 of file most-constants.h.

Referenced by process_sigsend_handler().

#define ISMINT (1 << 6)

Interrupt Status bit for MOST Interrupt: This bit is `1', as long as the /INT signal of the MOST Transceiver is active (='0'). If the IEMINT bit in the Interrupt Mask register (INTMASK) is set, a PCI Interrupt will be generated.

Writing a `1' clears this bit. If the /INT signal is still active the bit is set again immediately.

Definition at line 340 of file most-constants.h.

Referenced by ioctl_read_int(), and process_sigsend_handler().

#define ISGP (1 << 5)

Interrupt Status bit for General Purpose Interrupt: This bit is '1', if a GP_INT was active. Writing a `1' clears this bit.

Definition at line 346 of file most-constants.h.

#define ISSRX (1 << 4)

Interrupt Status bit for Synchronous RX Interrupt: This bit is `1', if the initiator has changed the Synchronous RX Buffer Page. If the IESRX bit in the Interrupt Mask register (INTMASK) is set, a PCI Interrupt will be generated. Writing a `1' clears this bit.

Definition at line 354 of file most-constants.h.

Referenced by most_sync_int_handler(), and most_sync_rt_interrupt_handler().

#define ISSTX (1 << 3)

Interrupt Status bit for Synchronous TX Interrupt: This bit is `1', if the initiator has changed the Synchronous TX Buffer Page. If the IESTX bit in the Interrupt Mask register (INTMASK) is set, a PCI Interrupt will be generated. Writing a `1' clears this bit.

Definition at line 362 of file most-constants.h.

Referenced by most_sync_int_handler(), and most_sync_rt_interrupt_handler().

#define ISARX (1 << 2)

Interrupt Status bit for Asynchronous RX Interrupt: This bit is `1', if the initiator has received an asynchronous message. If the IEARX bit in the Interrupt Mask register (INTMASK) is set, a PCI Interrupt will be generated. Writing a `1' clears this bit.

Definition at line 370 of file most-constants.h.

#define ISATX (1 << 1)

Interrupt Status bit for Asynchronous TX Interrupt: This bit is `1', if the initiator has transmitted an asynchronous message. If the IEATX bit in the Interrupt Mask register (INTMASK) is set, a PCI Interrupt will be generated. Writing a `1' clears this bit.

Definition at line 378 of file most-constants.h.

#define ISCPFSM (1 << 0)

Interrupt Status bit for Control Port Finite State Machine Interrupt: This bit is set ('1'), if the Control Port State Machine has executed a Control Port operation successfully. If the IECPFSM bit in the Interrupt Mask register (INTMASK) is set, a PCI Interrupt will be generated. Writing a `1' clears this bit.

Definition at line 387 of file most-constants.h.

#define MOST_PCI_VERSION_REG 0x18

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.2.6 Version (VERSION) Register -> p. 83

Definition at line 395 of file most-constants.h.

Referenced by revision().

#define MOST_PCI_SBC_NPOS_REG 0x1C

6.2 Control Data Port (CDP) Register And Miscallaneous (MISC) register 6.2.1 Control Data Port (CDP) Register 6.2.2.7 Synchronous Bandwidth And Node Position (SBC_NPOS) Register -> p. 84

Definition at line 403 of file most-constants.h.

Referenced by most_sync_set_sbc_reg().

#define MOST_PCI_STXSA_REG 0x20

6.3 Synchronous Data Port (SDP) Register 6.3.1 Synchronous TX Start Address (STXSA) Register -> p. 85

Definition at line 410 of file most-constants.h.

#define MOST_PCI_STXPS_REG 0x24

6.3 Synchronous Data Port (SDP) Register 6.3.2 Synchronous Tx Page Size (STXPS) Register -> p. 85

Definition at line 417 of file most-constants.h.

#define MOST_PCI_STXCTRL_REG 0x28

6.3 Synchronous Data Port (SDP) Register 6.3.3 Synchronous TX Control (STXCTRL) Register -> p. 86

Definition at line 424 of file most-constants.h.

Referenced by most_sync_int_handler(), and most_sync_rt_interrupt_handler().

#define STXST (1 << 1)

Synchronous TX Start Transfer bit: If set (`1'), initiator starts transferring synchronous transmit data. If cleared (`0'), transfer is stopped.

Definition at line 431 of file most-constants.h.

#define STXPP (1 << 0)

Synchronous TX Page Pointer bit: This bit represents the Synchronous TX Buffer Page currently accessed by the OS8604.

STXPP = '0' -> OS8604 is accessing page 0
STXPP = '1' -> OS8604 is accessing page 1

Definition at line 439 of file most-constants.h.

Referenced by most_sync_int_handler(), and most_sync_rt_interrupt_handler().

#define MOST_PCI_STXCA_REG 0x2C

6.3 Synchronous Data Port (SDP) Register 6.3.4 Synchronous TX Channel Adjustment (STXCA) Register -> p. 86

Definition at line 446 of file most-constants.h.

#define MOST_PCI_SRXSA_REG 0x30

6.3 Synchronous Data Port (SDP) Register 6.3.5 Synchronous RX Start Address (SRXSA) Register -> p. 86

Definition at line 453 of file most-constants.h.

#define MOST_PCI_SRXPS_REG 0x34

6.3 Synchronous Data Port (SDP) Register 6.3.6 Synchronous RX Page Size (SRXPS) Register -> p. 87

Definition at line 460 of file most-constants.h.

#define MOST_PCI_SRXCTRL_REG 0x38

6.3 Synchronous Data Port (SDP) Register 6.3.7 Synchronous RX Control (SRXCTRL) Register -> p. 87

Definition at line 467 of file most-constants.h.

Referenced by most_sync_int_handler(), and most_sync_rt_interrupt_handler().

#define SRXST (1 << 3)

Synchronous RX Start Transfer bit: If set (`1') initiator starts transferring synchronous receive data to the Synchronous RX Buffer Pages in the memory of the host system. If cleared (`0') transfer is stopped. Synchronous RX Page Pointer bit:

Definition at line 475 of file most-constants.h.

#define SRXPP (1 << 2)

Synchronous RX Page Pointer bit: This bit represents the Synchronous RX Buffer Page currently accessed by the OS8604.

SRXPP = '0' -> OS8604 is accessing page 0
SRXPP = '1' -> OS8604 is accessing page 1

Definition at line 483 of file most-constants.h.

Referenced by most_sync_int_handler(), and most_sync_rt_interrupt_handler().

#define MOST_PCI_SRXCA_REG 0x3C

6.3 Synchronous Data Port (SDP) Register 6.3.8 Synchronous RX Channel Adjustment (SRXCA) Register -> p. 87

Definition at line 490 of file most-constants.h.

#define MOST_PCI_ATXSA_REG 0x40

6.4 Asynchronous Data Port (ADP) Register 6.4.1 Asynchronous TX Start Address (ATXSA) Register -> p. 88

Definition at line 497 of file most-constants.h.

#define MOST_PCI_RESERVED_0 0x44

Reserved

Definition at line 502 of file most-constants.h.

#define MOST_PCI_ARXCTRL_REG 0x48

6.4 Asynchronous Data Port (ADP) Register 6.4.2 Asynchronous RX Control (ARXCTRL) Register -> p. 89

Definition at line 509 of file most-constants.h.

#define MOST_PCI_ATXCTRL_REG 0x4C

6.4 Asynchronous Data Port (ADP) Register 6.4.3 Asynchronous TX Control (ATXCTRL) Register -> p. 89

Definition at line 516 of file most-constants.h.

#define MOST_PCI_ARXSA_REG 0x50

6.4 Asynchronous Data Port (ADP) Register 6.4.4 Asynchronous RX Start Address (ARXSA) Register -> p. 89

Definition at line 523 of file most-constants.h.

#define MOST_PCI_RESERVED_1 0x54

Reserved

Definition at line 528 of file most-constants.h.

#define MOST_PCI_RESERVED_2 0x58

Reserved

Definition at line 533 of file most-constants.h.

#define MOST_PCI_AARXMA_REG 0x5C

6.4 Asynchronous Data Port (ADP) Register 6.4.5 Alternative Asynchronous RX Message Address (AARXMA) Register -> p. 89

Definition at line 540 of file most-constants.h.

#define MOST_PCI_ARXMA_REG 0x60

6.4 Asynchronous Data Port (ADP) Register 6.4.6 Asynchronous RX Message Address (ARXMA) Register -> p. 90

Definition at line 547 of file most-constants.h.

#define MOST_PCI_ARXMGA_REG 0x64

6.4 Asynchronous Data Port (ADP) Register 6.4.7 Asynchronous RX Message Group Address (ARXMGA) Register -> p. 90

Definition at line 554 of file most-constants.h.

#define MOST_PCI_RESERVED_3 0x68

Reserved

Definition at line 559 of file most-constants.h.

#define MOST_PCI_TRIG_REG 0x6C

6.5 Special Feature (SF) Register 6.5.1 Trigger (TRIG) Register -> p. 91

Definition at line 566 of file most-constants.h.

#define MOST_PCI_DSCTRL_REG 0x70

6.5 Special Feature (SF) Register 6.5.2 Dallas Silicon Key Control (DSCTRL) Register -> p. 93

Definition at line 573 of file most-constants.h.

Referenced by dsc_shift_read_byte(), dsc_shift_write_byte(), features(), get_license(), and keyctrl_reset().

#define MOST_PCI_RESERVED_4 0x74

Reserved

Definition at line 578 of file most-constants.h.

#define MOST_PCI_RESERVED_5 0x78

Reserved

Definition at line 583 of file most-constants.h.

#define DSCTL_EN_ASYNC (1 << 11)

Set when MOST Asynchronous transfers are enabled.

Definition at line 588 of file most-constants.h.

Referenced by features().

#define DSCTL_EN_SYNC (1 << 10)

Set when MOST Synchronous transfers are enabled.

Definition at line 593 of file most-constants.h.

Referenced by features().

#define DSCTL_EN_CTRL (1 << 9)

Set when MOST Control transfers are enabled.

Definition at line 598 of file most-constants.h.

Referenced by features().

#define DSCTL_EN_MASTER (1 << 8)

Set when master functions are enabled.

Definition at line 603 of file most-constants.h.

Referenced by features().

#define DSCTL_CRC_RST (1 << 7)

??

Definition at line 608 of file most-constants.h.

Referenced by get_license().

#define DSCTL_CRC_EN (1 << 6)

??

Definition at line 613 of file most-constants.h.

Referenced by get_license().

#define DSCTL_RD (1 << 5)

Read Dallas: This bit will be cleared automatically, after reading of Dallas chip.

DS_RD = `0' -> No action
DS_RD = `1' -> Generate read timing for Dallas

Definition at line 621 of file most-constants.h.

Referenced by dsc_shift_read_byte().

#define DSCTL_RD_VAL (1 << 4)

Dallas Read Value:

DS_RD_VAL = `0' -> Read `0' from Dallas
DS_RD_VAL = `1' -> Read `1' from Dallas

Definition at line 628 of file most-constants.h.

Referenced by dsc_shift_read_byte().

#define DSCTL_WR (1 << 3)

Write Dallas: This bit will be cleared automatically, after writing Dallas.

DS_WR = `0' -> No action
DS_WR = `1' -> Generate write timing for Dallas

Definition at line 636 of file most-constants.h.

Referenced by dsc_shift_write_byte().

#define DSCTL_WR_VAL (1 << 2)

Dallas Write Value:

DS_WR_VAL = `0' -> Write `0' to Dallas
DS_WR_VAL = `1' -> Write `1' to Dallas

Definition at line 643 of file most-constants.h.

Referenced by dsc_shift_write_byte().

#define DSCTL_RST (1 << 1)

Reset Dallas: This bit will be cleared automatically, after reset pulse.

DS_RST = `0' -> No action
DS_RST = `1' -> Generate reset pulse for Dallas

Definition at line 651 of file most-constants.h.

Referenced by keyctrl_reset().

#define DSCTL_PRE (1 << 0)

Dallas Present: This bit will automatically indicate Dallas presence status after a reset pulse.

DS_PRE = `0' -> Dallas not present
DS_PRE = `1' -> Dallas present

Definition at line 659 of file most-constants.h.

Referenced by keyctrl_reset().

#define LICENSE_ADDRESS_HW 0x00

??

Definition at line 664 of file most-constants.h.

Referenced by get_license().

#define LICENSE_ADDRESS_SW 0x08

??

Definition at line 669 of file most-constants.h.

#define LICENSE_ADDRESS_TO 0x10

??

Definition at line 674 of file most-constants.h.

#define MSGC 0x0085

This register controls sending and receiving of control messages. The status of the operations triggered by bMSGC is reported in the message status register bMSGS.

See OS8104 MOST Network Transceiver Final Product Data Sheet, p. 115

Definition at line 686 of file most-constants.h.

Referenced by ioctl_irq_reset().

#define MOST_PCI_LICENSE_REG 0x74

LIC: Undocumented License register.

Definition at line 692 of file most-constants.h.

Referenced by get_license().

#define MOST_PCI_LICCOMP_REG 0x78

LIC: Undocumented License compare register. Must be written to 1 to activate.

Definition at line 698 of file most-constants.h.

Referenced by get_license().

#define MOST_PCI_ISP_REG 0x7C

6.5 Special Feature (SF) Register 6.5.3 In-System PROM Programming (ISP) Register -> p. 94

Definition at line 705 of file most-constants.h.

#define MOST_PCI_I2C_REG 0x80

6.5 Special Feature (SF) Register 6.5.4 I2C Master (I2C) Register -> p. 95

Definition at line 712 of file most-constants.h.

#define MOST_PCI_I2S_REG 0x84

6.5 Special Feature (SF) Register 6.5.5 I2S (I2S) Register -> p. 95

Definition at line 719 of file most-constants.h.

#define MOST_PCI_RESERVED_6 0x88

Reserved

Definition at line 724 of file most-constants.h.

#define MOST_PCI_RESERVED_7 0x8C

Reserved

Definition at line 729 of file most-constants.h.

#define MOST_PCI_TSCNTR_REG 0x90

6.5 Special Feature (SF) Register 6.5.6 TimeStamp Counter (TSCNTR) Register -> p. 96

Definition at line 736 of file most-constants.h.

#define MOST_PCI_FMASK_REG 0xBC

6.5 Special Feature (SF) Register 6.5.7 Feature Mask (FMASK) Register -> p.96

Definition at line 743 of file most-constants.h.

#define MOST_PCI_RESERVED_8 0xFF

Reserved

Definition at line 748 of file most-constants.h.

#define MOST_IF_PAGE 0xFF

The memory location in which the page must be written to change the current page. See p. 63 of OS 8104 datasheet.

Definition at line 758 of file most-constants.h.

Referenced by readreg_8104(), and writereg_8104().

#define MOST_PCI_FW_NEW_PACKET_LEN_POS (1 << 0)

??

Definition at line 768 of file most-constants.h.

Referenced by revision().

#define MOST_PCI_FW_FOT_STATUS (1 << 1)

??

Definition at line 773 of file most-constants.h.

Referenced by revision().

#define MOST_PCI_FW_SEC_ASYNC_ADDR (1 << 2)

??

Definition at line 778 of file most-constants.h.

Referenced by revision().

#define MOST_PCI_FW_CHANGE_3DB (1 << 3)

??

Definition at line 783 of file most-constants.h.

#define MOST_PCI_FW_RX_TX_BIG_ENABLE (1 << 4)

??

Definition at line 788 of file most-constants.h.

Referenced by revision().

#define MOST_PCI_FW_CHANGE_FREQUENCY (1 << 5)

??

Definition at line 793 of file most-constants.h.

#define MOST_8104_SBC_REG 0x0096

Synchronous Bandwidth Control register of ths OS8104 MOST transceiver (not the OS8604 PCI interface)

Definition at line 799 of file most-constants.h.

Referenced by most_sync_set_sbc_reg().

#define MOST_MINOR_IDS 255

Number of minor ids for the driver.

Definition at line 804 of file most-constants.h.

Referenced by most_base_exit(), and most_base_init().

/home/hillier_g/checkout/most4linux/most-kernel/most-constants.h File Reference

Defines

Detailed Description

Define Documentation


Defines
#define	PCI_VENDOR_ID_OASIS 0x121D
#define	PCI_DEVICE_ID_OASIS_MOST_PCI_INTERFACE 0x4711
#define	MOST_DEVICE_NUMBER 8
#define	MOST_MAX_POLL 1024
#define	MAX_RETRIES 10
#define	MOST_DELAY_INCREMENT 10
#define	MOST_SYNC_OPENS 8
#define	NUM_OF_QUADLETS (60/4)
#define	STD_MOST_FRAMES_PER_SEC 44100
#define	MOST_FEATURE_SYNC (1 << 0)
#define	MOST_FEATURE_ASYNC (1 << 1)
#define	MOST_FEATURE_MASTER (1 << 2)
#define	MOST_FEATURE_CTRL (1 << 3)
#define	MOST_PCI_CMD_REG (0x00)
#define	MRST (1 << 11)
#define	EXEC (1 << 10)
#define	CPOP1 (1 << 9)
#define	CPOP0 (1 << 8)
#define	CMD_DATA 0xff
#define	VALUE_DATA 0xff
#define	MOST_PCI_RST_REG 0x04
#define	MOST_PCI_CTRL_REG 0x08
#define	WREN (1 << 3)
#define	RDEN (1 << 2)
#define	TXBIGEN (1 << 1)
#define	RXBIGEN (1 << 0)
#define	MOST_PCI_LOCKSTATUS_REG (0x0C)
#define	MOST_PCI_INTMASK_REG (0x10)
#define	IEMLOCK (1 << 8)
#define	IEMAINT (1 << 7)
#define	IEMINT (1 << 6)
#define	IEGP (1 << 5)
#define	IESRX (1 << 4)
#define	IESTX (1 << 3)
#define	IEARX (1 << 2)
#define	IEATX (1 << 1)
#define	IECPFSM (1 << 0)
#define	MOST_PCI_INTSTATUS_REG (0x14)
#define	ISMAINT (1 << 7)
#define	ISMINT (1 << 6)
#define	ISGP (1 << 5)
#define	ISSRX (1 << 4)
#define	ISSTX (1 << 3)
#define	ISARX (1 << 2)
#define	ISATX (1 << 1)
#define	ISCPFSM (1 << 0)
#define	MOST_PCI_VERSION_REG 0x18
#define	MOST_PCI_SBC_NPOS_REG 0x1C
#define	MOST_PCI_STXSA_REG 0x20
#define	MOST_PCI_STXPS_REG 0x24
#define	MOST_PCI_STXCTRL_REG 0x28
#define	STXST (1 << 1)
#define	STXPP (1 << 0)
#define	MOST_PCI_STXCA_REG 0x2C
#define	MOST_PCI_SRXSA_REG 0x30
#define	MOST_PCI_SRXPS_REG 0x34
#define	MOST_PCI_SRXCTRL_REG 0x38
#define	SRXST (1 << 3)
#define	SRXPP (1 << 2)
#define	MOST_PCI_SRXCA_REG 0x3C
#define	MOST_PCI_ATXSA_REG 0x40
#define	MOST_PCI_RESERVED_0 0x44
#define	MOST_PCI_ARXCTRL_REG 0x48
#define	MOST_PCI_ATXCTRL_REG 0x4C
#define	MOST_PCI_ARXSA_REG 0x50
#define	MOST_PCI_RESERVED_1 0x54
#define	MOST_PCI_RESERVED_2 0x58
#define	MOST_PCI_AARXMA_REG 0x5C
#define	MOST_PCI_ARXMA_REG 0x60
#define	MOST_PCI_ARXMGA_REG 0x64
#define	MOST_PCI_RESERVED_3 0x68
#define	MOST_PCI_TRIG_REG 0x6C
#define	MOST_PCI_DSCTRL_REG 0x70
#define	MOST_PCI_RESERVED_4 0x74
#define	MOST_PCI_RESERVED_5 0x78
#define	DSCTL_EN_ASYNC (1 << 11)
#define	DSCTL_EN_SYNC (1 << 10)
#define	DSCTL_EN_CTRL (1 << 9)
#define	DSCTL_EN_MASTER (1 << 8)
#define	DSCTL_CRC_RST (1 << 7)
#define	DSCTL_CRC_EN (1 << 6)
#define	DSCTL_RD (1 << 5)
#define	DSCTL_RD_VAL (1 << 4)
#define	DSCTL_WR (1 << 3)
#define	DSCTL_WR_VAL (1 << 2)
#define	DSCTL_RST (1 << 1)
#define	DSCTL_PRE (1 << 0)
#define	LICENSE_ADDRESS_HW 0x00
#define	LICENSE_ADDRESS_SW 0x08
#define	LICENSE_ADDRESS_TO 0x10
#define	MSGC 0x0085
#define	MOST_PCI_LICENSE_REG 0x74
#define	MOST_PCI_LICCOMP_REG 0x78
#define	MOST_PCI_ISP_REG 0x7C
#define	MOST_PCI_I2C_REG 0x80
#define	MOST_PCI_I2S_REG 0x84
#define	MOST_PCI_RESERVED_6 0x88
#define	MOST_PCI_RESERVED_7 0x8C
#define	MOST_PCI_TSCNTR_REG 0x90
#define	MOST_PCI_FMASK_REG 0xBC
#define	MOST_PCI_RESERVED_8 0xFF
#define	MOST_IF_PAGE 0xFF
#define	MOST_PCI_FW_NEW_PACKET_LEN_POS (1 << 0)
#define	MOST_PCI_FW_FOT_STATUS (1 << 1)
#define	MOST_PCI_FW_SEC_ASYNC_ADDR (1 << 2)
#define	MOST_PCI_FW_CHANGE_3DB (1 << 3)
#define	MOST_PCI_FW_RX_TX_BIG_ENABLE (1 << 4)
#define	MOST_PCI_FW_CHANGE_FREQUENCY (1 << 5)
#define	MOST_8104_SBC_REG 0x0096
#define	MOST_MINOR_IDS 255